[mpiwg-rma] RMA Errata

Jeff Hammond jeff.science at gmail.com
Mon Jan 19 08:50:52 CST 2015

My parents took the same lazy approach as the MPI Forum regarding
asynchronous progress in RMA, so I can only work on the RMA chapter
when I am communicating with Forum members via email or telecon.  This
makes me totally useless but I still tell my friends that I am a
high-quality implementation.

I fully support #2.  I'm sure that #1 makes sense but since PSCW makes
my brain hurt and I stopped using point-wise Lock/Unlock as soon as
MPI-3 dropped, I haven't thought about it much.



On Mon, Jan 19, 2015 at 6:42 AM, Jim Dinan <james.dinan at gmail.com> wrote:
> Bumping this thread for progress.  Please take a look a the two errata
> suggestions that I captured from the December meeting.  If folks feel that
> this is a good direction, I can convert the informal text below into proper
> errata proposals.
>  ~Jim.
> On Wed, Dec 17, 2014 at 6:39 PM, Jim Dinan <james.dinan at gmail.com> wrote:
>> Hi All,
>> Reviewing my notes from the WG meeting, it appears that the following
>> errata would clarify many misunderstandings of the MPI-3 RMA spec:
>> 1) Clarify the target process rank for load/store operations on shared
>> memory windows.  This is needed so that synchronization operations (e.g.
>> lock/unlock and PSCW) are well defined on shared memory windows.
>> 2) Clarify that that while there is one copy of the window data in memory
>> in the unified memory model, there are still public and private views that
>> must be synchronized according to the RMA semantics.
>> Is there enough support for these that they should be captured for future
>> discussion?
>> Cheers,
>>  ~Jim.
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Jeff Hammond
jeff.science at gmail.com

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