[mpiwg-rma] FW: [Mpi3-rma] [EXTERNAL] Re: MPI-3 UNIFIED model updates

Barrett, Brian W bwbarre at sandia.gov
Tue Aug 27 22:35:38 CDT 2013

On 8/27/13 1:59 PM, "Pavan Balaji" <balaji at mcs.anl.gov> wrote:

>On 08/27/2013 01:49 PM, Barrett, Brian W wrote:
>> I'm having trouble with the exact phrasing, but my thought is that we
>> should have an advice to users that says 1) while the view of memory is
>> consistent in UNIFIED, other artifacts (such as processor or memory
>> controller reordering) can result in unexpected behavior 2) MPI_WIN_SYNC
>> may be used to provide stronger ordering guarantees and 3) an
>> programmer may use other, implementation defined, semantics to provide
>> required ordering guarantees.
>Isn't (3) true for any MPI call in general, since the user can use
>implementation-defined alternate mechanisms for any of them?

Perhaps implementation-defined is the wrong word.  I'm not sure I agree
with keith's undefined fright, but perhaps platform-defined?  There's a
big difference between a replacement for MPI_WAIT and a memory barrier in
a loop.

>Also, I think we are ignoring the point Jim raised: does OpenSHMEM
>really need these semantics?

I think this is a grey area of OpenSHMEM and my belief is that it really
does need those semantics.


  Brian W. Barrett
  Scalable System Software Group
  Sandia National Laboratories

More information about the mpiwg-rma mailing list