[Mpi3-rma] [EXTERNAL] Re: MPI-3 UNIFIED model clarification

Pavan Balaji balaji at mcs.anl.gov
Sun Aug 4 19:55:15 CDT 2013

The paragraph below says load/store, though it also says "update".  I 
think that needs to be modified to load/store access (maybe).

The reason I say maybe is because loads are not a problem for hardware 
managed caches (even if they are noncoherent) since the cache line is 
not flushed back after just a load.  But it will be a problem for 
software managed caches, since they cannot distinguish loads and stores.

In any case, this is a separate problem, and it's better to discuss this 
separately, rather than on this email chain.

  -- Pavan

On 08/04/2013 07:38 PM, Jed Brown wrote:
> Pavan Balaji <balaji at mcs.anl.gov> writes:
>> Sorry, wrong rule.  Here's the right one:
>> "A put or accumulate must not access a target window once a load/store
>> update or a put or accumulate update to another (overlapping) target
>> window has started on a location in the target window, until the
>> update becomes visible in the public copy of the window. Conversely, a
>> store to process memory to a location in a window must not start once
>> a put or accumulate update to that target window has started, until
>> the put or accumulate update becomes visible in process memory. In
>> both cases, the restriction applies to operations even if they access
>> disjoint locations in the window."
> Your example had P1 *reading* from that non-overlapping part of its own
> memory.  If you change it to writing, then I see that the paragraph
> above applies, and is extra overhead relative to UNIFIED.  Thanks.

Pavan Balaji

More information about the mpiwg-rma mailing list