[Mpi3-rma] draft of a proposal for RMA interfaces

[Rajeev Thakur]

I think it would be good to add an FAQ section at the end, containing
answers to questions that will be asked of any RMA proposal, such as
non-cache-coherent, does it meet the needs of PGAS/Global Arrays, support
for heterogeneous, how does the target know of completion, how does it
interplay with existing RMA spec, etc. It will make sure that the proposal
addresses those issues, that we ourselves are clear of the answers, and that
they are not repeatedly raised at each meeting.

Rajeev 


> Richard Graham wrote:
>
>> Just to get discussion going again. Talking with several folks I have 
>> heard several concerns expressed about the proposal. I think it would 
>> be good if these (and others) could be raised on the list, so we can 
>> start discussion. We can continue this next week in Chicago, but 
>> Vinod will not be able to make this meeting, so an e-mail discussion 
>> will help.
>>
>> Here are the issues I have hear of so far:
>> - May not work well on current h/w that is not cache coherent, as it 
>> requires a remote thread in this case. I believe this is for the SX 
>> series of machines, but Jesper please correct me if I am wrong here. 
>> What would be an alternative approach that could provide expected 
>> performance on platforms that may require work on the remote end for 
>> RMA for correctness, and work well on platforms that do require very 
>> specific remote cache management (or other actions) for correctness ?
>> - Concern about future high-end platforms, under that assumption that 
>> these will not be cache coherent (and will actually have caches - if 
>> they don't this is not a concern), and therefore this proposal is 
>> aimed at a short-lived technical capability.
>> - What is missing ?