[Mpi-forum] Discussion points from the MPI-<next> discussion today

[Jed Brown]

On Fri, Sep 21, 2012 at 3:15 PM, N.M. Maclaren <nmm1 at cam.ac.uk> wrote:

> It's there in the standard.  In C99, which is more readily accessible
> and very similar to C90, the relevant wording is mainly in 5.1.2.3,
> 6.5 and 6.5.2.2.
>

This says nothing about a memory model. Practically speaking, volatile
accesses and sequence points only say that the instructions generated by
the compiler should be ordered/cannot be elided. It does not prevent the
CPU from reordering and does not require memory barriers so that the
effects become visible in some specified order.

See C11 7.17.3 (Order and consistency) and 7.17.4 (Fences) for the sort of
thing that we (and everyone else I have ever heard utter the phrase) mean
when we say "memory model".

http://en.wikipedia.org/wiki/Memory_model_(programming)
http://kernel.org/pub/linux/kernel/people/paulmck/perfbook/perfbook.html
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